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authorKonrad Eisele <konrad@gaisler.com>2010-11-09 16:27:39 (GMT)
committer Peter Korsgaard <jacmet@sunsite.dk>2010-11-25 08:16:13 (GMT)
commitd28a2b87d4bda8cf0caaa4f6b0626775d3e0e49c (patch)
tree81c8f67c863cbd1d5cdccba629284254e84a9e5e
parentc9f1651ea04bd0fcdb49275e3cae7fa2431a5379 (diff)
downloadbuildroot-d28a2b87d4bda8cf0caaa4f6b0626775d3e0e49c.tar.gz
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gcc-patch: Add patch for 4.4.5 to support Sparc-leon processors
Gcc patch that adds hfleon (fpu,v7), hfleonv8 (fpu, v8), sfleon (softfpu,v7), sfleonv8 (softfpu,v8) SPARC variants. Default cpu is selected with --with-cpu. Adds leon pipeline descrption to gcc. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
-rw-r--r--toolchain/gcc/4.4.5/950-sparc-leon.patch239
1 files changed, 239 insertions, 0 deletions
diff --git a/toolchain/gcc/4.4.5/950-sparc-leon.patch b/toolchain/gcc/4.4.5/950-sparc-leon.patch
new file mode 100644
index 0000000..ad18607
--- /dev/null
+++ b/toolchain/gcc/4.4.5/950-sparc-leon.patch
@@ -0,0 +1,239 @@
+diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/leon.md gcc-4.4.2/gcc/config/sparc/leon.md
+--- gcc-4.4.2.ori/gcc/config/sparc/leon.md 1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.4.2/gcc/config/sparc/leon.md 2010-10-19 11:56:58.000000000 +0200
+@@ -0,0 +1,56 @@
++;; Scheduling description for Leon.
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify
++;; it under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful,
++;; but WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++;; GNU General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3. If not see
++;; <http://www.gnu.org/licenses/>.
++
++
++(define_automaton "leon")
++
++(define_cpu_unit "leon_memory, leon_fpalu" "leon")
++(define_cpu_unit "leon_fpmds" "leon")
++(define_cpu_unit "write_buf" "leon")
++
++(define_insn_reservation "leon_load" 1
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "load,sload,fpload"))
++ "leon_memory")
++
++(define_insn_reservation "leon_store" 1
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "store,fpstore"))
++ "leon_memory+write_buf")
++
++(define_insn_reservation "leon_fp_alu" 1
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "fp,fpmove"))
++ "leon_fpalu, nothing")
++
++(define_insn_reservation "leon_fp_mult" 1
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "fpmul"))
++ "leon_fpmds, nothing")
++
++(define_insn_reservation "leon_fp_div" 16
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "fpdivs,fpdivd"))
++ "leon_fpmds, nothing*15")
++
++(define_insn_reservation "leon_fp_sqrt" 23
++ (and (eq_attr "cpu" "leon")
++ (eq_attr "type" "fpsqrts,fpsqrtd"))
++ "leon_fpmds, nothing*21")
++
+diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.c gcc-4.4.2/gcc/config/sparc/sparc.c
+--- gcc-4.4.2.ori/gcc/config/sparc/sparc.c 2010-10-19 11:55:17.000000000 +0200
++++ gcc-4.4.2/gcc/config/sparc/sparc.c 2010-10-19 11:56:58.000000000 +0200
+@@ -246,6 +246,30 @@
+ 0, /* shift penalty */
+ };
+
++static const
++struct processor_costs leon_costs = {
++ COSTS_N_INSNS (1), /* int load */
++ COSTS_N_INSNS (1), /* int signed load */
++ COSTS_N_INSNS (1), /* int zeroed load */
++ COSTS_N_INSNS (1), /* float load */
++ COSTS_N_INSNS (1), /* fmov, fneg, fabs */
++ COSTS_N_INSNS (1), /* fadd, fsub */
++ COSTS_N_INSNS (1), /* fcmp */
++ COSTS_N_INSNS (1), /* fmov, fmovr */
++ COSTS_N_INSNS (1), /* fmul */
++ COSTS_N_INSNS (15), /* fdivs */
++ COSTS_N_INSNS (15), /* fdivd */
++ COSTS_N_INSNS (23), /* fsqrts */
++ COSTS_N_INSNS (23), /* fsqrtd */
++ COSTS_N_INSNS (5), /* imul */
++ COSTS_N_INSNS (5), /* imulX */
++ 0, /* imul bit factor */
++ COSTS_N_INSNS (5), /* idiv */
++ COSTS_N_INSNS (5), /* idivX */
++ COSTS_N_INSNS (1), /* movcc/movr */
++ 0, /* shift penalty */
++};
++
+ const struct processor_costs *sparc_costs = &cypress_costs;
+
+ #ifdef HAVE_AS_RELAX_OPTION
+@@ -651,6 +675,10 @@
+ { TARGET_CPU_ultrasparc3, "ultrasparc3" },
+ { TARGET_CPU_niagara, "niagara" },
+ { TARGET_CPU_niagara2, "niagara2" },
++ { TARGET_CPU_sparchfleon, "sparchfleon" },
++ { TARGET_CPU_sparchfleonv8, "sparchfleonv8" },
++ { TARGET_CPU_sparcsfleon, "sparcsfleon" },
++ { TARGET_CPU_sparcsfleonv8, "sparcsfleonv8" },
+ { 0, 0 }
+ };
+ const struct cpu_default *def;
+@@ -689,6 +717,11 @@
+ /* UltraSPARC T1 */
+ { "niagara", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS},
+ { "niagara2", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9},
++ /* SPARC-LEON */
++ { "sparchfleon", PROCESSOR_LEON, MASK_ISA, MASK_FPU },
++ { "sparchfleonv8", PROCESSOR_LEON, MASK_ISA & ~(MASK_V8), MASK_V8|MASK_FPU },
++ { "sparcsfleon", PROCESSOR_LEON, MASK_ISA | MASK_FPU, 0 },
++ { "sparcsfleonv8", PROCESSOR_LEON, (MASK_ISA | MASK_FPU) & ~(MASK_V8), MASK_V8 },
+ { 0, 0, 0, 0 }
+ };
+ const struct cpu_table *cpu;
+@@ -855,6 +888,9 @@
+ case PROCESSOR_NIAGARA2:
+ sparc_costs = &niagara2_costs;
+ break;
++ case PROCESSOR_LEON:
++ sparc_costs = &leon_costs;
++ break;
+ };
+
+ #ifdef TARGET_DEFAULT_LONG_DOUBLE_128
+diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.h gcc-4.4.2/gcc/config/sparc/sparc.h
+--- gcc-4.4.2.ori/gcc/config/sparc/sparc.h 2010-10-19 11:55:17.000000000 +0200
++++ gcc-4.4.2/gcc/config/sparc/sparc.h 2010-10-19 11:56:58.000000000 +0200
+@@ -243,6 +243,10 @@
+ #define TARGET_CPU_ultrasparc3 9
+ #define TARGET_CPU_niagara 10
+ #define TARGET_CPU_niagara2 11
++#define TARGET_CPU_sparchfleon 12
++#define TARGET_CPU_sparchfleonv8 13
++#define TARGET_CPU_sparcsfleon 14
++#define TARGET_CPU_sparcsfleonv8 15
+
+ #if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \
+ || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \
+@@ -299,6 +303,26 @@
+ #define ASM_CPU32_DEFAULT_SPEC "-Asparclite"
+ #endif
+
++#if TARGET_CPU_DEFAULT == TARGET_CPU_sparchfleon
++#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon"
++#define ASM_CPU32_DEFAULT_SPEC ""
++#endif
++
++#if TARGET_CPU_DEFAULT == TARGET_CPU_sparcsfleon
++#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D_SOFT_FLOAT"
++#define ASM_CPU32_DEFAULT_SPEC ""
++#endif
++
++#if TARGET_CPU_DEFAULT == TARGET_CPU_sparchfleonv8
++#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D__sparc_v8__ "
++#define ASM_CPU32_DEFAULT_SPEC ""
++#endif
++
++#if TARGET_CPU_DEFAULT == TARGET_CPU_sparcsfleonv8
++#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D__sparc_v8__ -D_SOFT_FLOAT"
++#define ASM_CPU32_DEFAULT_SPEC ""
++#endif
++
+ #if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc
+ #define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__"
+ #define ASM_CPU32_DEFAULT_SPEC ""
+@@ -369,6 +393,10 @@
+ %{mcpu=ultrasparc3:-D__sparc_v9__} \
+ %{mcpu=niagara:-D__sparc_v9__} \
+ %{mcpu=niagara2:-D__sparc_v9__} \
++%{mcpu=sparchfleon:-Dsparcleon} \
++%{mcpu=sparchfleonv8:-Dsparcleon -D__sparc_v8__} \
++%{mcpu=sparcsfleon:-Dsparcleon -D_SOFT_FLOAT} \
++%{mcpu=sparcsfleonv8:-Dsparcleon -D_SOFT_FLOAT -D__sparc_v8__} \
+ %{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \
+ "
+ #define CPP_ARCH32_SPEC ""
+@@ -533,6 +561,7 @@
+ PROCESSOR_V7,
+ PROCESSOR_CYPRESS,
+ PROCESSOR_V8,
++ PROCESSOR_LEON,
+ PROCESSOR_SUPERSPARC,
+ PROCESSOR_SPARCLITE,
+ PROCESSOR_F930,
+diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.md gcc-4.4.2/gcc/config/sparc/sparc.md
+--- gcc-4.4.2.ori/gcc/config/sparc/sparc.md 2010-10-19 11:55:17.000000000 +0200
++++ gcc-4.4.2/gcc/config/sparc/sparc.md 2010-10-19 11:56:58.000000000 +0200
+@@ -89,6 +89,7 @@
+ "v7,
+ cypress,
+ v8,
++ leon,
+ supersparc,
+ sparclite,f930,f934,
+ hypersparc,sparclite86x,
+@@ -320,6 +321,7 @@
+ (include "ultra3.md")
+ (include "niagara.md")
+ (include "niagara2.md")
++(include "leon.md")
+
+
+ ;; Operand and operator predicates and constraints
+diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/t-leon gcc-4.4.2/gcc/config/sparc/t-leon
+--- gcc-4.4.2.ori/gcc/config/sparc/t-leon 1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.4.2/gcc/config/sparc/t-leon 2010-10-19 11:56:58.000000000 +0200
+@@ -0,0 +1,16 @@
++# configuration file for LEON cpu
++
++LIB1ASMSRC = sparc/lb1spc.asm
++LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3
++
++# We want fine grained libraries, so use the new code to build the
++# floating point emulation libraries.
++FPBIT = fp-bit.c
++DPBIT = dp-bit.c
++
++dp-bit.c: $(srcdir)/config/fp-bit.c
++ cat $(srcdir)/config/fp-bit.c > dp-bit.c
++
++fp-bit.c: $(srcdir)/config/fp-bit.c
++ echo '#define FLOAT' > fp-bit.c
++ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+diff -Naurb gcc-4.4.2.ori/gcc/config.gcc gcc-4.4.2/gcc/config.gcc
+--- gcc-4.4.2.ori/gcc/config.gcc 2010-10-19 11:55:17.000000000 +0200
++++ gcc-4.4.2/gcc/config.gcc 2010-10-19 11:56:11.000000000 +0200
+@@ -2978,6 +2978,9 @@
+ | v9 | ultrasparc | ultrasparc3 | niagara | niagara2)
+ # OK
+ ;;
++ sparchfleon | sparcsfleon | sparchfleonv8 | sparcsfleonv8 | leon)
++ tmake_file="${tmake_file} sparc/t-leon"
++ ;;
+ *)
+ echo "Unknown cpu used in --with-$which=$val" 1>&2
+ exit 1